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CXA1898Q
Recording/Playback Equalizer Amplifier
Description The CXA1898Q is an IC developed for analog signal processing in tape recorders. Processing for both the recording and playback systems is achieved on one chip. Features * Recording equalizer Gp and Fp can be adjusted externally. * Recording mute function * AGC (Automatic Gain Control) * Comparator for AMS (Automatic Music Sensor) * Recording/playback equalizer amplifier with 1.7 times speed switching * 11-bit serial data interface Absolute Maximum Ratings * Supply voltage * Operating temperature * Storage temperature * Allowable power dissipation Operating Conditions Supply voltage 48 pin QFP (Plastic)
Structure Bipolar silicon monolithic IC Applications All analog signal processing in the cassette decks of tape recorders and compact music centers (Applicable to Sankyo Seiki mfg. Co., Ltd. YK47R-KF202 R/P head or equivalent)
VCC 12 V Topr -20 to +75 C Tstg -65 to +150 C PD 735 mW
VCC
6.5 to 10.0
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E94329B78
CXA1898Q
Block Diagram and Pin Configuration (Top View)
AGC IN2
REC IN2
AGC OUT2
REC OUT2
AGC TC
D GND
XRESET
RFC
VCC
36
35
VG
GND
34
33
32
31
30
29
28
27
26
25
IREF 37
10k
GND
DATA
AGC GAIN 19.5dB
GND
24 CLK
IREF
PB OUT2 38
RECEQ
23 LATCH
PB FB22 39 GND 210k PB FB12 40 GND PB INB2 41 GND GND PB INA2 42 70k 210k 40k
D1
22 M2
D2 DECK A/B D10 SPEED D9 B EQ A EQ
GND
21 M1
PBEQ CTL
D3
GND
20 PL2
SHIFT REGISTERS
LATCHES
D4
GND
19 PL1
AGC
GND GND
70k 70k
AGC OFF D8
PB INA1 43 GND GND PB INB1 44 GND PB FB11 45 210k GND PB FB21 46 210k 40k 70k
D5
GND
18 BPB
RECEQ CTL
D6
GND
17 BPA
SPEED B EQ
D7
GND
16 PB MUTE
MUTE
AGC GAIN 19.5dB
D9
GND
15 SPEED
RECEQ
PB OUT1 47
D8 D10 D9
D11
GND
14 R MUTE2
AMS GAIN 48
AMS GND 1 2 3 4 5 6
10k
D11
GND
13 R MUTE1
7
8
9
10
11
12
GND
AGC OUT1
REC OUT1
AGC IN1
REC IN1
AMS FIL
GP CAL
FP CAL
AMS GND
-2-
RMUTE1 I
AMS OUT
A EQ
B EQ
CXA1898Q
Pin Description Pin No. Symbol DC voltage I/O I/O resistance
VCC
Equivalent circuit
Description
VCC
6 31
AGC IN1 AGC IN2
147
3k 47k x4
4.0V
I
50k
6 31
AGC signal input. Input resistance changes between 47k and 3k
GND
VGS
VCC
VCC
147
23k
7 30
REC IN1 REC IN2
7
4.0V
I
50k
30
50k 1.8k VGS VGS GND GND
Recording equalizer input.
VCC x2
VCC
8 29
AGC OUT1 AGC OUT2
147
4.0V
O
147
8 29 x4
500 500
18.8k
47.8k
VGS
AGC output pin. AGC is applied at -11dBm or more.
5.3k GND GND GND VGS
VCC VCC x3 500
40k x2 500 5p
9 28
REC OUT1 REC OUT2
4.0V
O
147
9 28 147 x 10
Recording equalizer output.
GND GND
-3-
CXA1898Q
Pin No.
Symbol
DC voltage
I/O
I/O resistance
Equivalent circuit
VCC VCC
Description
147
10
A EQ
--
I
--
10
A deck equalizer switch. Low: 120s EQ High: 70s EQ
GND
GND
VCC
VCC
11
B EQ
2.5V (when open)
147 50k
5k
I
53k
11 5k
B deck equalizer switch. Low: Normal Tape, 120s EQ High: CrO2 Tape, 70s EQ Medium: Metal Tape, 70s EQ
GND GND
VCC 50A 20k x2 20k x2
VCC
12
RMUTE1 I
--
I
--
12
147 2.7V
GND GND
Recording mute ON/OFF switch. Low: Mute OFF High: Mute ON Fader function is realized by the external time constant circuit. Connects Pin 13 (RMUTE1). Output for recording mute ON/OFF switch control signal. Outputs D11 from Pin 25 (DATA). Output for recording/ playback equalizer speed switch control signal. Outputs D9 from Pin 25 (DATA). Low: Normal Speed High: High Speed (1.7 times) Output pin for playback mute ON/OFF switch control signal. Outputs D7 from Pin 25 (DATA). Connects a resistor to VDD for Pins 13 to 16.
13 14
R MUTE1 R MUTE2
VDD VCC
15
SPEED
5.0V (when reset) (when Pin 25 (DATA) is set to high)
x4
O
--
5k 13 14 15 x4 20k 16 GND GND 5k
16
PB MUTE
-4-
CXA1898Q
Pin No. 17 18 19 20 21 22
Symbol BPA BPB PL1 PL2 M1 M2
DC voltage
I/O
I/O resistance
VDD
Equivalent circuit
Description Outputs D6 from Pin 25 (DATA). Outputs D5 from Pin 25 (DATA).
VCC
5.0V (when reset) (when Pin 25 (DATA) is set to high)
x4
O
--
10k 17 18 19 x4
Outputs D4 from Pin 25 (DATA). Outputs D3 from Pin 25 (DATA).
20k
20 GND 21 22 GND
Outputs D2 from Pin 25 (DATA). Outputs D1 from Pin 25 (DATA). Serial data interface latch input. Serial data interface reset input. Low: Reset. At this time serial data outputs (Pins 13 to 22) are all open (high).
23
LATCH
25A 2k 23
VCC 100A
-- 26 XRESET
I
--
26 x4 GND 5p 10.5k 24k
GND
VCC
24
CLK
24
25A 4k
100A
Serial data interface clock input.
-- 25 DATA
I
--
25 x4 GND 10.5k 24k
Serial data interface serial data input.
GND
VCC x2 x2 200 500 x2 500 5k 100k GND 32 147
VCC
32
AGC TC
0.0V
--
--
x4 200
Connects a resistor and capacitor for determining AGC attack/recovery time constants.
GND
-5-
CXA1898Q
Pin No.
Symbol
DC voltage
I/O
I/O resistance
VCC
Equivalent circuit
VCC 30k x2 500 To each 500 VSG x4 30k GND GND
Description
x2
34
VG
4.0V
--
60k
147 34 45k
Signal reference voltage. Connects a capacitor for ripple rejection.
35
VCC
8.0V
--
--
35
VCC
Power supply.
VCC
VCC x3 x3
36
RFC
8.0V
--
--
36 147
x 250
Connects a resistor and capacitor for obtaining stable voltage with power supply ripple rejected.
To each RFS GND
VCC
VCC
x3 5p 500
38 47
PB OUT2 PB OUT1
38
2.8V
O
147
47
147 x6
500
5k x 2
x2
Playback equalizer output.
GND GND
-6-
CXA1898Q
Pin No.
Symbol
DC voltage
I/O
I/O resistance
VCC
Equivalent circuit
RFS 2k x4 2k x4
Description
39 46
PB FB22 PB FB21
147
2.8V
--
--
39 46
7k x3
x3
Connects a capacitor for determining playback equalizer time constants, such as 120s and 70s.
GND GND GND
VCC
VCC 10k VCC
40 45
PB FB12 PB FB11
RFS
VCC
1.4V
--
105k
10k
Playback equalizer negative feedback.
1k 41 42 43 147 70k x6 x6 1k x2 210k 5p 40 147 210k 45
41 42 43 44
PB INB2 PB INA2 PB INA1 PB INB1
44
0.0V
I
70k
GND GND GND
Playback equalizer input.
VCC
VCC 10
48
AMS GAIN
3.5V
--
--
48 147
100k
Connects a resistor for determining AMS signal detection level and a capacitor for determining HPF cut-off frequency.
GND
GND
Note) The resistance of open collector outputs (Pins 2 and 13 to 22) can be also connected to VCC.
-7-
CXA1898Q
Electrical Characteristics (Ta = 25C, VCC = 8.0V, VDD = 5.0V, refer to Electrical Characteristics Measurement Circuit) Item Operating voltage Current consumption AGC ON output level AGC ON channel balance AGC ON distortion AGC OFF output level AMS No signal detection threshold level 120s-NS frequency response 120s-NS frequency response 70s-NS frequency response 120s-HS frequency response 70s-HS frequency response Signal handling Total harmonic distortion S/N ratio Output offset voltage VCC NORM-NS, VCC = 8V, No signal Pin 32 external R300k/ /C47F f = 1kHz, Vin = -25dBm Pin 32 external R300k/ /C47F f = 1kHz, Vin = -15dBm Pin 32 external R300k/ /C47F f = 1kHz, Vin = 0dBm Pin 32 external R300k/ /C 47F f = 1kHz, Vin = -25dBm Pin 48 external R9.1k, C0.015F Pin 1 external R100k/ /C0.1F f = 5kHz, 0dB = -21dBm (at PBEQ reference output level) f = 315Hz, Vin = -70dBm Reference for frequency response f = 2.7kHz, Vin = -58.5dBm at 120s-NS, 315Hz f = 4.5kHz, Vin = -53.8dBm at 120s-NS, 315Hz f = 5.3kHz, Vin = -52.5dBm at 120s-NS, 315Hz f = 9.1kHz, Vin = -47.8dBm at 120s-NS, 315Hz 120s-NS, RL = 2.7k f = 1kHz, THD + N = 1% 120s-NS, RL = 2.7k f = 1kHz, Vin = -56.4dBm 120s-NS, Rg = 2.2k "A" weighting filter 120s-NS, Rg = 70k Measurement conditions Min. 6.5 13.5 -13.0 -2.0 -- -7.5 Typ. 8.0 18.0 -11.0 0.0 0.3 -5.5 Max. 10.0 22.5 -9.0 2.0 1.5 -3.5 Unit V mA dBm dB % dBm
AGC
-11.5
-8.2
--
dB
-23.0 -0.1 -0.1 1.8 2.1 -10.0 -- 55.0 2.4
-21.0 1.3 1.7 3.0 3.6 -6.0 0.3 62.0 2.7
-19.0 2.9 2.9
dBm
Playback equalizer amplifier block
dB 4.8 5.1 -- 0.7 -- 3.2 dBm % dB V
-8-
CXA1898Q
Item Reference input level Reference output level Channel balance NORM-NS frequency response NORM-NS frequency response NORM-NS frequency response CrO2-NS frequency response CrO2-NS frequency response Recording equalizer amplifier block CrO2-NS frequency response METAL-NS frequency response METAL-NS frequency response METAL-NS frequency response NORM-HS frequency response NORM-HS frequency response NORM-HS frequency response CrO2-HS frequency response CrO2-HS frequency response CrO2-HS frequency response METAL-HS frequency response METAL-HS frequency response METAL-HS frequency response
Measurement conditions NORM-NS, 315Hz, input level at which reference output can be obtained NORM-NS, 315Hz NORM-NS, 315Hz, Output difference 1ch-2ch for -27.9dBm input f = 3kHz at NORM-NS, 315Hz, reference output -20dB f = 8kHz at NORM-NS, 315Hz, reference output -20dB f = 12kHz at NORM-NS, 315Hz, reference output -20dB f = 3kHz at NORM-NS, 315Hz, reference output -20dB f = 8kHz at NORM-NS, 315Hz, reference output -20dB f = 12kHz at NORM-NS, 315Hz, reference output -20dB f = 3kHz at NORM-NS, 315Hz, reference output -20dB f = 8kHz at NORM-NS, 315Hz, reference output -20dB f = 12kHz at NORM-NS, 315Hz, reference output -20dB f = 5kHz at NORM-NS, 315Hz, reference output -20dB f = 15kHz at NORM-NS, 315Hz, reference output -20dB f = 20kHz at NORM-NS, 315Hz, reference output -20dB f = 5kHz at NORM-NS, 315Hz, reference output -20dB f = 15kHz at NORM-NS, 315Hz, reference output -20dB f = 20kHz at NORM-NS, 315Hz, reference output -20dB f = 5kHz at NORM-NS, 315Hz, reference output -20dB f = 15kHz at NORM-NS, 315Hz, reference output -20dB f = 20kHz at NORM-NS, 315Hz, reference output -20dB
Min. -29.4 -- -1.5 -1.3 3.7 10.4 1.8 6.7 13.2 3.3 5.9 11.3 -0.7 8.3 13.5 3.6 12.0 17.0 4.9 10.5 14.7
Typ. -27.9 -10.0 0.0 -0.2 5.7 13.4 3.0 8.4 15.8 4.5 7.4 13.7 0.2 10.5 16.7 4.9 14.2 20.0 6.1 12.4 17.4
Max. -26.4 -- 1.5 1.1 7.3 16.4 4.2 9.7 18.2 5.7 8.9 15.8 1.7 12.3 19.5 6.0 16.0 22.5 7.3 14.0 19.7
Unit dBm
dB
-9-
CXA1898Q
Item Recording equalizer amplifier block Signal handling Total harmonic distortion S/N ratio Output offset voltage Mute characteristics 1 Mute characteristics 2
Measurement conditions NORM-NS, RL2.7k f = 1kHz, THD = 1% NORM-NS, RL2.7k f = 1kHz, 0dB NORM-NS, Rg = 5.1k "A" weighting filter NORM-NS NORM-NS, f = 1kHz 8dB, Pin 12 = 3.5V NORM-NS, f = 1kHz 8dB, Pin 12 = 2.0V A-EQ (Pin 10) A-EQ (Pin 10) B-EQ (Pin 11) B-EQ (Pin 11) B-EQ (Pin 11) RMUTE1-I (Pin 12) RMUTE1-I (Pin 12)
Min. 8.0 -- 57.0 3.6 -- -8.3 0.0 2.5 0.0 2.2 4.2 0.0 3.5
Typ. 8.8 0.2 60.6 4.0 -100 -7.0 -- -- -- -- -- -- --
Max. -- 0.5 -- 4.4 -80
Unit dB % dB V
dB -4.3 0.5 VCC 0.5 2.8 VCC 0.5 VCC V
Control voltage low level 1 Control voltage high level 1 Control voltage low level 2 Control voltage medium level 1 Control voltage high level 2 Control voltage low level 3 Control voltage high level 3
Note) NORM-NS : NORMAL TAPE-NORMAL SPEED NORM-HS : NORMAL TAPE-HIGH SPEED CrO2-NS : CrO2 TAPE-NORMAL SPEED CrO2-HS : CrO2 TAPE-HIGH SPEED METAL-NS : METAL TAPE-NORMAL SPEED METAL-HS : METAL TAPE-HIGH SPEED 120s-NS : EQ = 120s-NORMAL SPEED 120s-HS : EQ = 120s-HIGH SPEED 70s-NS : EQ = 70s-NORMAL SPEED 70s-HS : EQ = 70s-HIGH SPEED
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CXA1898Q
Item Low level input voltage High level input voltage Low level output voltage High level output offleak current 11-bit serial data interface block
Measurement conditions VIL (LATCH/CLK/DATA/XRESET) (Pins 23, 24, 25, 26) VIH (LATCH/CLK/DATA/XRESET) (Pins 23, 24, 25, 26) VOL, IOL = 2mA (max) (Pins 13, 14, 15, 16, 17, 18, 19, 20, 21, 22) IOZ Leak current which flows to the output pin when Ioz output is open; applied voltage is 10V.
Min. 0.0 3.5 0.0
Typ. -- -- --
Max. 1.5 VDD 0.5
Unit
V
-- 500 -- -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- -- --
1.0 -- 1.0 1.0 1.0 1.0
A kHz
Maximum clock frequency (1) fCK Minimum clock pulse width Minimum reset pulse width Minimum data setup time Minimum data hold time Minimum data pulse width Minimum latch setup time Minimum latch hold time Minimum clock hold time (2) tWC (3) tWR (4) tSDK (DATA CLK) (5) tHCD (CLK DATA) (6) tWD (7) tSLD (LATCH DATA) (8) tHCL (CLK LATCH) (9) tHLC (LATCH CLK)
s 2.0 1.0 1.0 1.0
Note) * VDD is CPU supply voltage 5.0V. * The maximum value for VDD is Pin 35 (VCC) voltage. * For high level output off leak current, VCC is 10.0V.
- 11 -
CXA1898Q
Timing Chart for 11-bit Serial Data Interface
tWC 3.5V CLK 1.5V tSDK 3.5V DATA 1.5V tSLD D1 D2 tHCD tWD tWC
LATCH 1.5V
3.5V CLK
tHCL
tHLC
DATA
D10
D11
3.5V LATCH 1.5V
XRESET 1.5V tWR
- 12 -
XRESET
S17B
S21A
S13A
S13B
S15
S21B
100
10k
10k
100
S17A
47k
8.0V
AC INPUT 0.1 10 10 10 0.1 300k 47 5.1k S19
S4A 0.47 0.47 4.7 2.2 1k
S4B
ATT
-29dB 36 34 25 DATA CLK 24 VG GND D GND 33 29 27 32 30 28 26 31 RFC VCC S6B AGC TC IREF 35
S6A
ATT 37 12k S3B S12A 2.7k 2.2 39 TL072 40 PB FB12 47 377k S7A 0.1 2.2k S8 0.47 377k S7B 0.1 2.2k S9 0.47 CXA1898Q 43 PB INA1 0.47 BPB 18 377k S7C 0.1 2.2k S10 377k S7D 2.2k S11 0.47 PB FB11 44 PB INB1 0.1 45 47 46 PB FB21 100 100k 0.018 42 PB INA2 PL1 19 41 PB INB2 PL2 20 100 600 0.018 S1B PB FB22 M2 22 38 PB OUT2
5.1k
10k
-40dB
2.7k S12C
ATT
S7E
S2A
S2B
0.1
390k
100
10k
DATA
Electrical Characteristics Measurement Circuit
AGC IN2
REC IN2
AGC OUT2
-17dB
S3A
REC OUT2
XRESET
CLK
LATCH 23
LATCH
ATT
-9dB
10k 2k M1 21 2k 10k 2k 10k 2k 10k 2k BPA 17 10k 2k PB MUTE 16 10k 2k SPEED 15 10k 2k 10k
S38
S1A
ATT
S37
-6dB GND
AMS FIL
AMS OUT
AMS GND
FP CAL
GP CAL
AGC IN1
REC IN1
AGC OUT1
REC OUT1
A EQ
B EQ
1
2
3
4
5 0.47
6 0.47
7 4.7
8 2.2
9
RMUTE1 I
10k
0.1 10k
27k
27k
10k
5.1k
2.7k
S27
S23
100k
0.1 100k
5.1k S20
S24 S25 S26
S505
REC MUTE
1kHz Band Pass Filter (20dB)
A EQ
0.1 B EQ 10k
S12D
S7F
0.1
120s
70s
S28A
S18A
47k
390k
100
100
100
10k
10k
10k
0.5V S14A S16 S14B S18B S22A S22B
S39
NORM CrO2 METAL
4.2V 2.0V 2.5V 3.5V 5.0V GND DC OUTPUT
OFF
ON
S28B
0.1
- 13 -
GND S12B 2.7k 2.2 AMS GAIN 48 0.015 9.1k 47 PB OUT1
S36
S35
S34
S33
S501
BUF
S32
S31
S502
30dB AMP R MUTE2 14
10k 2k R MUTE1 13 10k 2k 10 11 12
S30
AC OUTPUT
S503
"A" Weighting Filter
S29
S504
Audio (22.2Hz-22.2kHz) Filter
CXA1898Q
CXA1898Q
Application Circuit
GND VCC GND GND GND GND 0.1 10 1k 100 47 2.2meg 47 0.47 2.7k 10k GND VDD GND
2.2
100k 2.2
4.7
AGC IN2
REC IN2
AGC OUT2
REC OUT2
AGC TC
D GND
XRESET
RFC
VCC
36 12k GND
35
VG
GND
34
33
32
31
30
29
28
27
26
37 GND
10k
IREF
GND
DATA
25
24
CLK GND 47k
GND 10k 2.2
38
RECEQ
PB OUT2
AGC GAIN 19.5dB
IREF
23
LATCH VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC VDD or VCC
PB FB22 820p GND 150p 180p GND 12mH GND PB INB2 41 10k 0.018 47 100 PB FB12 40 39 GND 210k 210k 40k
47k D1 22 M2
D2 DECK A/B D10 SPEED D9 B EQ A EQ
GND
21
M1
47k
PBEQ CTL
GND GND 70k
D3
GND
20
PL2
47k
REC
SHIFT REGISTERS
PB
LATCHES
R/P-HEAD DECK-B
PB INA2
GND 42
DECK-A PB-HEAD
D4
GND
19
PL1
47k
BIas OSC
AGC
GND PB INA1 43 GND GND PB INB1 GND 44 GND
70k 70k
AGC OFF D8
REC
PB
D5
GND
18
BPB
47k
70k
RECEQ CTL
GND GND 180p GND 150p 820p 12mH 10k 0.018 PB FB21 47 100 PB FB11
D6
GND
17
BPA
47k
47k 45 210k GND 46 210k 40k SPEED B EQ D7 GND 16 PB MUTE
MUTE
AGC GAIN 19.5dB
D9
GND
15
SPEED
47k
RECEQ
10k GND
2.2
PB OUT1 47
D8 D10 D9
D11
GND
14
R MUTE2
47k
10k
GND 0.1 1k
AMS GAIN 48
AMS GND 1 2 3 4 5 6
D11
GND
13
R MUTE1
47k 47k
7
8
9
10
11
12
GND
AGC OUT1
REC OUT1
AGC IN1
REC IN1
AMS FIL
GP CAL
FP CAL
AMS GND
100k 100k 0.1
4.7
0.1 2.2
27k
27k
0.47
10k 2.7k 0.1
RMUTE1 I
10k
VDD or VCC
AMS OUT
GND
GND
GND
GND
A EQ
B EQ
GND
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 14 -
CXA1898Q
1. System control mode Playback and recording equalizer (1) Playback equalizer (120s/70s) A-EQ (Pin 10) L DECK-AB (serial data D10 (Pin 25)) L H 120s (A DECK) H 70s (A DECK) L B-EQ (Pin 11) M/H
According to A EQ control 120s (B DECK) 70s (B DECK)
According to B EQ control
(2) Recording equalizer (Normal, CrO2, Metal) B-EQ (Pin 11) REC MODE L Normal (Type I) M CrO2 (Type II) H Metal (Type IV)
(3) Recording mute (Pin 12) Rec Mute Control voltage Mute OFF GND VCL 0.5V -7dB attenuation 2.0V Mute ON 3.5V VCH VCC
Muting is achieved by varying the recording equalizer amplifier gain just like an electronic volume, according to the DC voltage applied to the REC MUTE pin. (4) FP CAL (Pin 4) The standard resistor setting is 27k, but when resistance value is larger, fo (Hz) is low, and when resistance value is smaller, fo (Hz) is high. (5) Gp Cal (Pin 5) The standard resistor setting is 27k, but when resistance value is larger, gain is larger, and when resistance value is smaller, gain is smaller.
- 15 -
CXA1898Q
2. 11-bit serial data interface
CLk (Pin 24)
DATA (Pin 25)
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
LATCH (Pin 23)
XRESET (Pin 26)
* The DATA signal is taken in at the rising edge of the CLK signal. * The DATA signal is taken in to the internal shift register when the LATCH signal is low. (Outputs (Pins 13 to 22) hold the previous value while the LATCH signal is low.) * The internal shift register data is latched and output in parallel at the rising edge of the LATCH signal. (Internal shift register data is loaded while the LATCH signal is high.) * The CLK signal of 11th bit should fall after the LATCH signal rises. * Reset is done when the XRESET pin is low. (asynchronous method) Outputs (Pins 13 to 22) are all high (open) during reset. DATA (Pin 25) D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 M2 M1 PL2 PL1 BPB BPA PB-MUTE AGC-OFF SPEED DECK-AB REC-MUTE Output Control signal Output pin Pin 22 Pin 21 Pin 20 Pin 19 Pin 18 Pin 17 Pin 16 -- Pin 15 -- Pin 14/Pin 13 Input set at low L L L L L L L AGC function stops Low, normal speed A DECK selected Low mute OFF Input set at high H (OPEN) H (OPEN) H (OPEN) H (OPEN) H (OPEN) H (OPEN) H (OPEN) AGC function operates High (open) 1.7 B DECK selected High (open) mute ON
- 16 -
CXA1898Q
* Make sure that RFC is 5.5V or more and XRESET is 1.5V or less, and 1s or more when resetting by applying CR time constant to XRESET (Pin 26) and turning power ON.
5.5V or more RFC (Pin 36)
XRESET (Pin 26)
1.5V or less
1s or more
* When resetting with CPU or other when power is turned ON
5.5V or more RFC (Pin 36)
5.0V XRESET (Pin 26)
0V 1s or more
* Examples of AGC control during timer recording (1) Resets when power is turned ON (AGC function operates). (2) AGC is turned OFF after AGC inputs (Pins 6 and 31) rise. (External capacitor charge of AGC TC is discharged.) (3) AGC is turned ON and timer recording begins.
- 17 -
CXA1898Q
LATCH CLK DATA XRESET DGND 5V SW GND 100/25V GND C21 15 L R19 B0 1 10 A0 L 11 B1 H 2 12 A1 13 A2 4 L R18 H 100 B1 VDD C19 0.1 A1 2 19 Y1 3 4 14 B2 L 15 A3 B4 H 8 14 16 VDD 1 C18 0.1 B3 16 1 A>BOUT 74HC85 A>BIN A=BIN AH
QH
VSS
14
Y3 VSS 8 7 7 Y2 9 6 6 10 74HC08 (2) B2 5 5 74HC00 11 A2 4 12 Y1 1 3 13 B1 2 A1 1 A4 Y4 A2 B3 B2 A3 Y2 VSS A3 B3 Y4 A4 B4 VDD C20 0.1
Y3
SERIAL XQH IN
8
H
9
6
7
8
74HC165 (2)
D1
10
D2
11
D3
12
13
15
CLK2 2
CLK1
14
VDD
S/XL
C17 0.1
Circuit Diagram for 11-bit Serial Data Transfer Evaluation Tool
5
13
100 XQ2 VSS 7 XQ1 Q1 74HC74 (4) XPR1 D2 13 XR2 14 VDD C13 0.1 R12 10k R11 10k CLK1 D1 XR1 6 Q2 XPR2 CLK2 Y3 8 A3 9 10 B3 5 12 11 Y4 4 12 A4 3 13 B4 2 14 VDD 1 C12 0.1 C9 0.1 C8 0.1 VSS Y2 B2 74HC08 (1) A2 Y1 B1 A1 10 R16 8 7
XQ2 VSS 7 XQ1 6 9 6 10 Q1 5 11 XPR1 4 12 CLK1 3 D1 2 XR1 1 4 Q2 XPR2 74HC74 (2) CLK2 D2 XR2 VDD C14 0.1
R/C2 11 XRES2 6 12 11 XQ2 5 13 Q1 4 14 C15 1000P C1 3 15 2 R14 220 R/C1 R13 2.2k 16 VDD 1 C11 0.1 74HC123 R15 220 C2 Q2 XQ1 XRES1 B1 XA1
10
B2
SERIAL XQH IN 7 LH LH L D15 11 6 C16 4.7 D14 12 5 D13 13 4 LH D12 14 3 H
A
H
74HC165 (1)
D9
10
D10
11
D11
12
13
15
CLK2 2 16 1
CLK1
14
VDD
S/XL
C10 0.1
16
Q1 9 R10 17 10 XQ2 8 Q2 9 10 XPR2 VSS XQ1 Q1 74HC74 (1) XQ2 8 7 Q2 6 9 3 15 10 74HC74 (3) ON START 5 XPR2 VSS XQ1 Q1 Y4 8 7 100 A4 6 9 10 Y5 8 5 Y3 A3 6 VSS R9 220 CLOCK 7 11 RESET 74HC4040 12 Q9 5
VSS 2 Q2 Q3 Q4
XLOAD 8 9 10 7 R8 220 6
VSS
ENA 1 ENA P 11 500kHz 1
RESET 12 5 250kHz 74HC04 13 R2 220
DD
10k
10k
R6
R5
OFF ON RESET
CLK2 12 D2 R3 10k 13 XR2 14 VDD C5 0.1
XPR1 CLK1 D1 XR1
OFF 3
CLK2 4 12 D2 13 XR2 2 14 VDD 1 C4 0.1
XPR1 CLK1 D1 XR1
Q8 4 4 12 14 Y6 3 13 A6 2 14 VDD 1 A2 Y1 A1 Q10 3 C7 15P 15 Q11 2 16 1 4.4MHz R1 1M C6 15P VDD C3 0.1 C2 0.1
13
A5
Y2
Q7 Q5 Q6 Q12
EXCLK
11
11
11
R4 220
Q9 4 R7 220
74HC161
DC
Q8 14 3
DB
Q10 15 2
DA
Q11 16 1
CLOCK
VDD XRESET
C 0.1
EXCLK
DGND
1
2
3
4
5
6
7
8
1
2
H
D
E
3
LH
C
F
4
LH
B
G
5
LH L
D8
- 18 -
9 R17 68k
XA2 9
VSS
QH 8 9
VSS
8
9
6
7
8
1
2
H
D
E
3
LH
C
F
4
LH
G
5
L
Timing Chart for 11-bit Serial Data Transfer Evaluation Tool
(1) CLK
(2) CLK
(3) START PULSE
(4)
(5)
(6) = (4)
(7) S/L
(8) CLK GATE CONT. CLOCK STOP
(9)
- 19 -
Dummy D1 D2 D3 D4 D5 D6 D7 D8
(10) A = B, H COUNT RESET 2s
(11) HC123
(12)
(13)
(14) RESET/CLOCK STOP and COUNT RESET
(15) DATA HC165
D9
D10
D11
(16) CLOCK
(17) = (8)
(18)
CXA1898Q
(19) LATCH
CXA1898Q
3. AMS (1) AMS output logic Detection status AMS OUT (Pin 2) Signal detection No signal detection L H
AMS OUT (Pin 2) is an open collector output pin. When a 2.2k resistor is connected to VDD: Low : approximately 0.5V (IOL = 2mA (max.)) High : VDD Fig. 1 shows the AMS block diagram.
PB OUT1 Inside IC
20k
SA LPF
HPF DET 100k
20k
25kHz AMS GAIN 48 1 AMS OUT 2 AMS FIL 3 AMS GND
PB OUT2
R1
R2
C1
GND
VDD VDD
C2
R3
VDD
GND
Fig. 1 AMS Block Diagram
Fig. 2 shows the frequency response of the signal output from HPF.
fC G
GAIN (dB)
10
1kHz f (Hz)
25kHz
100kHz
Fig. 2 Frequency Response
- 20 -
CXA1898Q
(2) AMS level setting The AMS level is set by adjusting HPF gain and cut-off frequency with the external resistor and capacitor at Pin 48. G and fc in Fig. 2 are obtained from the following formula. G = 20log (1 + 100k/R) [dB] - (1) fc = 1/ (2 * * C * R) [Hz] Full-wave rectifier is applied for the signal at DET. Signal detection time is set by the time constant of Pin 1 external resistor and capacitor. DET signal detection level: = -7.5dBm (typ.) = playback equalizer reference output level + AMS level + HPF gain - (2) Playback equalizer reference output level of -21dBm is 0dB. Ex.) To set AMS level at -25dB, determine and set the constant for Pin 48 external resistor. (Calculate assuming PBOUT1 = PBOUT2) First, get the required HPF gain from formula (2). -7.5dBm = -21dBm + (-25dB) + HPF gain, so HPF gain = 38.5dB. Next, get Pin 48 external resistance from formula (1). 38.5dB = 20log (1 + 100k/R), so R 1.2k, and external resistance is 1.2k.
- 21 -
CXA1898Q
Example of Representative Characteristics
Quiescent current consumption vs. Supply voltage
25
ICC-Quiescent current consumption (mA)
24 23 22 21 20 19 18 17 16 15 6 7 8 9 10 11
VCC-Supply voltage (V)
VCC = 8V
Playback equalizer frequency response
65
PB IN
0.47 100
PB FB1
PB FB2
PB OUT
60 55
0.018
2.2k
GAIN (dB)
50 45 40 35 30 25
120s - NS 120s - HS 70s - NS 70s - HS 20 50 100 200 500 1k 2k 5k 10k 20k 50k
Frequency (Hz)
- 22 -
47
M
2.2
CXA1898Q
Recording equalizer frequency response
30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 -2 VCC = 8V 0dB = NORM - NS, 315Hz, -30dBm (Tape) (Speed) NORM- NS CrO2- NS METAL- NS
Output response (dB)
20
50
100 200
500
1k
2k
5k
10k 20k
50k
Frequency (Hz)
Recording equalizer frequency response
30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 -2 VCC = 8V 0dB = NORM - NS, 315Hz, -30dBm (Tape) (Speed) NORM- HS CrO2- HS METAL- HS
Output response (dB)
20
50
100 200
500
1k
2k
5k
10k 20k
50k
Frequency (Hz)
- 23 -
CXA1898Q
Output level vs. Mute voltage
10 VCC = 8V (Tape) (Speed) NORM- NS 0dB = reference output level +8dB f = 1kHz
0
-10
-20
-30
Output level (dB)
-40
-50
-60
-70
-80
-90
-100 0.0
1.0
2.0
3.0
4.0
5.0
6.0
RMUTE1 (Pin 1) voltage
VCC = 8V 120s - NS AMS OUT 5V 0dB = -21dBm, 315Hz (playback equalizer reference output level)
AMS input level (playback equalizer output level) (dB)
AMS no signal detection level frequency response
30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -35 -40 A : 0.015 9.1k B : 0.1 1k
A
48
AMS FIL
1
2
AMS OUT 100k 100k
to5V
A : Pin 48 for R9.1k, C0.015 B : Pin 48 for R1k, C0.1
AMS GAIN
50k
B
20
50
100 200
500
1k
2k
5k
10k 20k
Frequency (Hz)
- 24 -
0.1
CXA1898Q
AGC Output response
10
5
AGC TC
VCC = 8V 1kHz AGC OFF
Output level (dBm)
32 0 300k -5 47
-10 AGC ON -15
-35
-30
-25
-20
-15
-10
-5
Input level (dBm)
Recording equalizer total harmonic distortion
VCC = 8V Norm - NS mode RL = 2.7k 1kHz 0dB = -10dBm
Playback equalizer total harmonic distortion
VCC = 8V 120s - NS mode RL = 2.7k 1kHz
2.0
2.0
T.H.D. + Noise (%)
T.H.D. + Noise (%)
1.0
1.0
0.5
0.5
0.2
0.2
0.1
0.1
-15
-10
-5
0
5
10
-30
-25
-20
-15
-10
-5
Output level (dB)
Output level (dB)
- 25 -
CXA1898Q
Package Outline
Unit: mm
48PIN QFP (PLASTIC)
15.3 0.4 + 0.4 12.0 - 0.1 + 0.1 0.15 - 0.05
36
25
0.15
37
24
48
13
+ 0.2 0.1 - 0.1
1 + 0.15 0.3 - 0.1
12
0.8
0.12 M
+ 0.35 2.2 - 0.15
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-48P-L04 QFP048-P-1212-B LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER / PALLADIUM PLATING COPPER / 42 ALLOY 0.7g
NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
- 26 -
0.9 0.2
13.5

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